Implementation of plesiochronous digital multiplexer based on FPGA for the FSO system

The paper puts forward a solution of plesiochronous data multiplexer for a free space optical (FSO) system, which makes full use of the capability of digital multiplexer by expanding the transfer capacity, the method takes majority decision measures and uses filter modules which greatly improved the reliability of the whole system. The system was designed by taking TOP DOWN method. All of the functional modules were described in VHDL. The whole system was accomplished by FPGA chip EP1C3T100C6. Taking the multiplexing of three plesiochronous digital as example, the result of simulation agrees with the experiment result. It is concluded that the solution can greatly reduce interference signals and transfer plesiochronous data signal in FSO accurately and reliably.